IIT Bombay Team Wins Prestigious VLSI User Design Track Competition at VLSID 2025
Made-in-India anti-fuse (One Time Programmable) OTP memory technology and design pioneers India’s memory manufacturing
Mumbai : In a landmark achievement, the IIT Bombay team won the highly competitive VLSI User Design Track Competition at the 38th International Conference on VLSI Design and the 24th International Conference on Embedded Systems. The conference was held in Bengaluru during January 4–8, 2025. This victory is a testament to India’s growing prominence in the global semiconductor landscape.
Securing electronic systems against unauthorized access and tampering has become paramount in today’s interconnected world. The IIT Bombay team’s design leverages its patented PECVD SiO2 capacitors as anti-fuse elements with low programming voltage (3.3V) and CMOS integration at 180nm node at Semiconductor Labs, Mohali to enable security functions. The VLSI User Design Track, an integral part of the VLSID conference, provides a unique platform to showcase cutting-edge innovation to the vibrant IC Design research community.
The award-winning design was spearheaded by –
▪ Ajay Kumar Singh (Former Senior Project Research Scientist)
▪ Shreeniwas Daulatabad (Project Scientist)
▪ Shatadal Chatterjee (Senior Project Research Scientist)
▪ Abhishek Kadam and Shreyas Deshmukh (Senior Ph.D. students/research scholars
at IIT Bombay)
The chip was entirely designed at IIT Bombay and fabricated at the Semiconductor Laboratory (SCL), Chandigarh. This is made possible by the technology adoption of OTP Memory on the 180 nm technology node manufacturing line – jointly by the IITB & SCL teams. This is evidence of India’s homegrown innovation in semiconductor design and manufacturing.
The team from SCL – especially Suvashish Tiwari, Sumit Soni, Rohit Ranjan, Akash Sharma, Avinash Singh, Deep Sehgal, Sumit Soni, Pratiksha Malviya, Gurpreet Singh, and Manoj Wadhwa partnered with IITB team to support the project.
Speaking about the team’s success at the VLSID Conference, Prof. Udayan Ganguly (Professor of Electrical Engineering, IIT Bombay) said, “As India builds fab with imported technology, the ability to build indigenous memory technology at scale is essential for sustenance and growth of the semiconductor ecosystem. Our capability is a key enabler for the same.”
Looking ahead, this OTP technology will enable indigenously designed and manufactured security chips essential for data protection and secure communication. It has particular promise for applications requiring radiation-hardened memory suitable for space missions and critical areas like e-passports and driving licenses.
The technology development by the IIT Bombay team will soon be commercialized through Numelo Tech Pvt Ltd, an incubated startup under the Society for Innovation and Entrepreneurship (SINE) at IIT Bombay
